Lesson 2/Learning Event 1
LESSON 2
DC TELEGRAPH CIRCUIT PATCHING
TASK:
Describe
the
primary
consideration
for
patching
of
telegraph circuits, the factors affecting telegraph circuit
patching, characteristics of digital signals, and the
function of the DAS-10 Distortion Analyzer System.
CONDITIONS:
Given information about the patching of telegraph circuits
affecting telegraph circuit patching, characteristics of
digital signals and the DAS-10 Distortion Analyzer System.
STANDARDS:
Demonstrate competency of the task skills and knowledge by
responding to the multiple-choice practice exercise; select
the ONE answer that BEST completes the statement or answers
the question covering telegraph circuit patching with 70
percent accuracy.
(This objective supports Tasks 113-616-
1003, Perform Fault Isolation on a Single DC Circuit; 113-
616-1007, Activate a Circuit; 113-616-3020, Test Circuit
for Composite Data Transmission Level; 113-616-3024, Test
Circuit for Total Peak Distortion, Maximum Mark or Space
Distortion, TD-1T.)
REFERENCES:
DCAC 310-70-2, Volume III; FM 11-486-12.
Learning Event 1: FACTORS AFFECTING TELEGRAPH CIRCUIT PATCHING
The process of patching VF telegraph circuits is relatively easy to
accomplish because there are no problems as polarity of signal, and the
signals can be sent over any telephone circuit. The process of patching
DC telegraph circuits is more complex because of several factors which
enter the picture. Moreover, DC patching can be accomplished only at the
DC loops.
To aid in DC patching, each station has a patchboard that is
entirely independent from the VF patchboard.
As a further aid, each
station is equipped with a device to measure current and telegraph
distortion in DC telegraph loops. In most cases, telegraph distortion is
measured in the receive telegraph loops because distortion measured here
reflects overall system performance.
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